Transparent In-Circuit Assertions for FPGAs

Commonly used in software design, assertions are statements placed into a design to ensure that its behaviour matches that expected by a designer. Although assertions apply equally to hardware design, they are typically supported only for logic simulation, and discarded prior to physical implementation. We propose a new HDL-agnostic language for describing latency-insensitive assertions and novel methods to add such assertions transparently to an already placed-and-routed circuit without affecting the existing design. We also describe how this language and associated methods can be used to implement semi-transparent exception handling. The key to our work is that by treating hardware assertions and exceptions as being oblivious or less sensitive to latency, assertion logic need only use spare FPGA resources. We use network-flow techniques to route necessary signals to assertions via spare flip-flops, eliminating any performance degradation, even on large designs (92% of slices in one test). Experimental evaluation shows zero impact on critical-path delay, even on large benchmarks operating above 200MHz, at the cost of a small power penalty

The First World War Centenary in the UK: ‘A Truly National Commemoration’?

Prime Minister David Cameron has called for ‘a truly national commemoration of the First World War’. This article shows this to be problematic, politicised and contested. This is in part due to the elision of English and British histories. Scottish, Welsh and Irish responses are noted, and the role and commemorations of ‘our friends in the Commonwealth’. There are tensions around interpretations of empire and race. There has been a failure to appreciate that the debates about the legacies of the First World War are deeply entangled with those of colonialism

Knowledge Transfer in Automatic Optimisation of Reconfigurable Designs

This paper presents a novel approach for automatic optimisation of reconfigurable design parameters based on knowledge transfer. The key idea is to make use of insights derived from optimising related designs to benefit future optimisations. We show how to use designs targeting one device to speed up optimisation of another device. The proposed approach is evaluated based on various applications including computational finance and seismic imaging. It is capable of achieving up to 35% reduction in optimisation time in producing designs with similar performance, compared to alternative optimisation methods

DeepPump: Multi-pumping deep Neural Networks

This paper presents DeepPump, an approach that generates CNN hardware designs with multi-pumping, which have competitive performance when compared with previous designs. Future work includes integrating DeepPump with other optimisations, and providing further evaluations on various FPGA platforms

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration

The FASTER (Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration) EU FP7 project, aims to ease the design and implementation of dynamically changing hardware systems. Our motivation stems from the promise reconfigurable systems hold for achieving high performance and extending product functionality and lifetime via the addition of new features that operate at hardware speed. However, designing a changing hardware system is both challenging and time-consuming. FASTER facilitates the use of reconfigurable technology by providing a complete methodology enabling designers to easily specify, analyze, implement and verify applications on platforms with general-purpose processors and acceleration modules implemented in the latest reconfigurable technology. Our tool-chain supports both coarse- and fine-grain FPGA reconfiguration, while during execution a flexible run-time system manages the reconfigurable resources. We target three applications from different domains. We explore the way each application benefits from reconfiguration, and then we asses them and the FASTER tools, in terms of performance, area consumption and accuracy of analysis

EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures

© 2016 IEEE. To handle the stringent performance requirements of future exascale-class applications, High Performance Computing (HPC) systems need ultra-efficient heterogeneous compute nodes. To reduce power and increase performance, such compute nodes will require hardware accelerators with a high degree of specialization. Ideally, dynamic reconfiguration will be an intrinsic feature, so that specific HPC application features can be optimally accelerated, even if they regularly change over time. In the EXTRA project, we create a new and flexible exploration platform for developing reconfigurable architectures, design tools and HPC applications with run-time reconfiguration built-in as a core fundamental feature instead of an add-on. EXTRA covers the entire stack from architecture up to the application, focusing on the fundamental building blocks for run-time reconfigurable exascale HPC systems: new chip architectures with very low reconfiguration overhead, new tools that truly take reconfiguration as a central design concept, and applications that are tuned to maximally benefit from the proposed run-time reconfiguration techniques. Ultimately, this open platform will improve Europe's competitive advantage and leadership in the field

‘The Invisible Chain by Which All Are Bound to Each Other’: Civil Defence Magazines and the Development of Community During the Second World War

This article uses local collaboratively produced civil defence magazines to examine how community spirit was developed and represented within the civil defence services during the Second World War. It highlights the range of functions which the magazines performed, as well as the strategies employed by civil defence communities to manage their emotions in order to keep morale high and distract personnel from the fear and boredom experienced while on duty. The article also discusses silences in the magazines — especially around the experience of air raids — and argues that this too reflects group emotional management strategies. The significance of local social groups in developing narratives about civil defence and their workplace communities is demonstrated, and the article shows how personnel were able to engage with and refashion dominant cultural narratives of the ‘people’s war’ in order to assert their own status within the war effort

17 ways to say yes:Toward nuanced tone of voice in AAC and speech technology

People with complex communication needs who use speech-generating devices have very little expressive control over their tone of voice. Despite its importance in human interaction, the issue of tone of voice remains all but absent from AAC research and development however. In this paper, we describe three interdisciplinary projects, past, present and future: The critical design collection Six Speaking Chairs has provoked deeper discussion and inspired a social model of tone of voice; the speculative concept Speech Hedge illustrates challenges and opportunities in designing more expressive user interfaces; the pilot project Tonetable could enable participatory research and seed a research network around tone of voice. We speculate that more radical interactions might expand frontiers of AAC and disrupt speech technology as a whole

A broken silence? Mass Observation, Armistice Day and ‘everyday life’ in Britain 1937–1941

Between 1937 and 1941 the social survey organization Mass Observation collected material on the ways that the British people experienced and thought about the commemorative practices that marked the anniversary of the Armistice of 1918. What they found was that while people were largely united in their observation of the rituals of remembrance, their thoughts and feelings about these practices were diverse. For some, the acts of commemoration were a fitting way to pay tribute to both the dead and the bereaved. For others, these acts were hypocritical in a nation preparing for war. This article draws on the Mass Observation material to trace some of the diverse ways that remembrance was embodied in everyday life, practised, experienced and understood by the British people as the nation moved once again from peace to war, arguing that studies of the practices of remembrance alone tell us little about how they have been understood by participants

Scaling the nexus: towards integrated frameworks for analysing water, energy and food

The emergence of the water-energy-food (WEF) nexus concept following the 2011 Bonn Nexus Conference has resulted in a change to the way we perceive our natural resources. Global pressures such as climate change, and population growth have highlighted the fragility of our WEF systems, necessitating integrated solutions across multiple scales and levels. Whilst a number of frameworks and analytical tools have been developed since 2011, a comprehensive WEF nexus tool remains elusive, hindered in part by our limited data and understanding of the interdependencies and connections across the WEF systems. To achieve this, the community of academics, practitioners and policy-makers invested in WEF nexus research are addressing several critical areas that currently remain as barriers. Firstly, the plurality of scales (e.g., spatial, temporal, institutional, jurisdictional) necessitates a more comprehensive effort to assess interdependencies between water, energy and food, from household to institutional and national levels. Secondly, and closely related to scale, a lack of available data often hinders our ability to quantify physical stocks and flows of resources. In this paper, we elucidate many of the challenges that have arisen across nexus research, including the impact of multiple scales in operation across the nexus, and concomitantly, what impact these scales have on data accessibility. We review some of the critical frameworks and tools that are applied by nexus researchers and discuss some of the steps required to develop from nexus thinking to an operationalizable concept, with a consistent focus on scale and data availability